1. Field of the Invention
The present invention relates to a method for controlling the presence and amount of residual material on a wafer prior to metal deposition in a semiconductor fabrication process and, more particularly, to a closed loop technique employing a residual gas analyzer for accomplishing the same.
2. Description of the Related Art
Integrated circuits are manufactured from wafers of a semiconducting substrate material. Layers of materials are added, removed, and/or treated during fabrication to create the integrated, electrical circuits that make up the device. Virtually any fabrication process essentially comprises the following four basic operations:                layering, or adding thin layers of various materials to a wafer from which a semiconductor is produced;        patterning/etching, or removing selected portions of the added layers;        doping, or placing specific amounts of dopants in selected portions of the wafer through openings in the added layers; and        heat treating, or heating and cooling the materials to produce desired effects in the processed wafer.Although there are only four basic operations, they can be combined in hundreds of different ways, depending upon the particular fabrication process. See, e.g., Peter Van Zant, Microchip Fabrication A Practical Guide to Semiconductor Processing (3d Ed. 1997 McGraw-Hill Companies, Inc.) (ISBN 0-07-067250-4).        
One important quality control consideration includes ensuring separation of operations. Most operations in a process flow involve some form of selective chemistry and/or physical operation that materially changes the wafers under fabrication. One operation may be used in the flow with another operation whose selective chemistry or physical operation are fundamentally incompatible. In other words, the materials used or the physical operations employed in the first operation may interfere with, diminish, or destroy the efficacy of the second operation. If this effect is of sufficient magnitude, a defective device, a defective wafer, or even a batch of defective wafers may result.
For example, consider a process flow that includes a common layering operation, known as “physical vapor deposition” (“PVD”), followed by a what is commonly known as a chemical mechanical polishing, or a “CMP” operation. In CMP operations, a previously deposited material is polished from the surface of a wafer to planarize the wafer for subsequent procession steps. More particularly, the wafer is turned upside down on a polishing pad, a slurry is introduced between the wafer and the polishing pad, and the wafer is rotated against the polishing pad until the deposited material is sufficiently polished away. A general discussion of CMP may be found in van Zant, supra, at 300–302. A PVD operation sputters a layer of a metal onto a wafer. A general discussion explaining the sputtering principles of PVD operations may also be found in van Zant, supra, at pp. 404–409.
If after the CMP operation there is any residual deposited material or any residual slurry or chemical on the wafer, this residual material may interfere with the sputtering process in the PVD system. This interference may result in an inadequate or incomplete layering of the metal that might render the completed device defective. This interference may also lead to a host of process control problems. Exemplary of these process control problems are excessive process, defect and maintenance control variabilities, and inconclusive causation analysis as to what the problem is. Thus, it is desirable that CMP operations be performed such that, after the operations are completed, the amount of residual material, i.e., the slurry, be reduced or eliminated.
Current process flows monitor various aspects of PVD operations to improve their efficacy or to find errors causing defective wafers. One aspect that is monitored is separation from the preceding operation. For example, if the preceding operation is a CMP operation, the process flow will examine the incoming wafers to determine whether there is any residual material, slurry, or chemicals on the wafer. Unfortunately, current integration process technology cannot measure residual material, slurry, or chemicals on wafers incoming to a PVD process.
Instead, this type of monitoring is typically uncontrolled or is controlled through a typical PVD metal sequence consisting of a degas, sputter etch, metal deposition, and quench. During these individual processes the wafers are heated using either internal pedestal temperature methods or from process conditioning which translates into increased energy on the wafer. This wafer temperature causes the residual slurry and/or chemicals to desorb from the wafers as volatiles vapors. These vapors may condense on process chamber walls or other system parts and “contaminate” the chamber or the complete system, thereby affecting further wafer processing quality.
To monitor these desorbed volatile vapors, “residual gas analyzers” (“RGAs”) have been inserted into the process chambers where manual monitoring of the vapors can occur within the vacuum chamber. The RGA performs a spectroscopic analysis of the desorbed volatiles. Unfortunately, RGAs typically provide raw spectral data that requires a highly trained person to interpret and use the data. Furthermore, there is no way to automatically incorporate this knowledge back into the process. The individual must instead personally communicate this information to and negotiate with the owner of the equipment performing the previous process to implement appropriate corrective action. Since this owner is not responsible for the performance of the RGA nor, frequently, the PVD, these negotiations seldomly result in any kind of agreement satisfactory to both sides.
The present invention is directed to resolving one or all of the problems mentioned above.